
38
4428E–8051–02/08
AT/TS80C31X2
14.5.6
External Clock Drive Waveforms
Figure 14-10. External Clock Drive Waveforms
14.5.7
AC Testing Input/Output Waveforms
Figure 14-11. AC Testing Input/Output Waveforms
AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing
measurement are made at VIH min for a logic “1” and VIL max for a logic “0”.
14.5.8
Float Waveforms
Figure 14-12. Float Waveforms
For timing purposes a port pin is no longer floating when a 100 mV change from load voltage
occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH
≥ ± 20mA.
14.5.9
Clock Waveforms
Valid in normal clock mode. In X2 mode XTAL2 signal must be changed to XTAL2 divided by
two.
V
CC-0.5 V
0.45 V
0.7V
CC
0.2V
CC-0.1 V
T
CHCL
T
CLCX
T
CLCL
TCLCH
T
CHCX
0.45 V
V
CC-0.5 V
0.2V
CC+0.9
0.2V
CC-0.1
INPUT/OUTPUT
VOL+0.1 V
V
OH-0.1 V
FLOAT
VLOAD
VLOAD+0.1 V
V
LOAD-0.1 V